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ALTERA TERASIC BLASTER DRIVER

We have a prefix with 8 slow clocks, but in between the second and the third slow clock, there’s a signal fast clock group. We see a similar pattern, but interestingly enough, it’s not the same. In addition, there are roughly 3 idle cycles between a fast clock group. For this investigation, it doesn’t matter what gets transported when, but it’s almost certain that the slow clock cycles are used to move the JTAG TAP from iDLE state to the scan DR or scan IR state, and that the fast clock groups are used to rapidly scan data in and out of a scan data register. All processing is done with a simply state machine. The Terasic doesn’t have that problem:

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Terasic vs Cheap Clone USB Blaster

Yes, delete it Cancel. It may be tedasic 12MHz is really just pushing things too much. In addition, there are roughly 3 idle cycles between a fast clock group.

The Terasic doesn’t have that problem: The set of signals below that is a slightly zoomed in version of the one above. And at the end you have a suffix with 2 slow clock cycles.

As I wrote earlierthe biggest issue with the cheap clone is that it doesn’t work on my eeColor Color3 board. For this investigation, it doesn’t matter what gets transported when, but it’s almost certain that the slow clock cycles are used to move the JTAG TAP from iDLE state to the scan DR or scan IR state, and that the fast clock groups are used to rapidly scan data in and out of a scan data register.

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Terasic USB Blaster Cable For Altera – % compatible with Altera USB blaster download cable

I was supposed to work on getting the SiI up and runningbut UPS delivered a nice package today:. Meanwhile, during a fast clock group, the clock toggles at 6MHz. Zooming in on the slow clocks, we see a clock frequency of kHz.

This is the first transaction that travels over the Blasster cable when you issue the “nios2-terminal” command.

Altera USB Blaster Driver Installation Instructions

For the overview, look at the upper set. In the middle we have the expected 16 fast clock groups. I was supposed to work on getting the SiI up and runningbut UPS delivered a nice package today: In the middle there are 16 groups with fast clock cycles each group teraxic itself 8 clock cycles.

If we ignore for a second that the cheap clone doesn’t work on this particular board, the biggest consequence of the chapeau clone is that bulk transfers are much slower: It’s not that it’s blasted About Us Contact Hackaday. The cheap clone was never able to get reliable contact. But the cheap clone runs TCK at exactly double the speed of the Terasic, and both devices only use a flimsy, cheap flat cable.

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My money is on the clock speed: When you zoom in on the slow clock cycles, you can measure a TCK frequency of kHz: It looks like the cheap clone is able to squeeze out bits really fast, but there’s quite a bit of software overhead in processing the next byte in the USB packet. The suffix is really different, with 6 clock clocks but also a fast clock group in between.

There are 3 major sections: What remains is the question about why the blastdr clone doesn’t work. The most important signal here is TCK, in yellow.

We see a similar pattern, but interestingly enough, it’s not the same. All processing is done with a simply state machine. A fast clock group sets the clock at 12MHz instead of 6MHz.

We have a prefix with 8 slow clocks, but in between ferasic second and the third slow clock, there’s a signal fast clock group.

Terasic – USB Blaster Cable – USB Blaster Download Cable

While the Terasic was rock solid in its communication with the Color3 board. And here’s the equivalent of the cheap clone. For the cheap clone, the spacing is huge: